http://scholars.ntou.edu.tw/handle/123456789/24606
標題: | Algorithm and VLSI Architecture of a Near-Optimum Symbol Detector for QSM MIMO Systems | 作者: | Yen, Mao-Hsu Lu, Hoang-Yang Lu, Ken-Hua Lin, Shao-Yueh Chan, Chia-Chen |
關鍵字: | Quadrature spatial modulation;givens rotation;coordinate rotation digital computer (CORDIC) | 公開日期: | 2023 | 出版社: | IEEE-INST ELECTRICAL ELECTRONICS ENGINEERS INC | 卷: | 11 | 起(迄)頁: | 144113-144125 | 來源出版物: | IEEE ACCESS | 摘要: | Driven by the rapidly growing demand for high quality of service (QoS) in wireless communications, quadrature spatial modulation (QSM) multiple-input multiple-output (MIMO) technologies have received intensive research attention. In this paper, a multiplier-free and divider-free detection algorithm and a corresponding hardware architecture are presented. The proposed algorithm has four steps: 1) applying COordinate Rotation DIgital Computer (CORDIC)-based Givens rotations to QR decompose the fading channel matrices, 2) mapping the transmitted M-ary quadrature amplitude modulation (M-QAM) symbols to the binary phase shift keying (BPSK)-modulated bits, 3) symbol slicing to estimate the transmitted symbols for all transmit antenna combinations (TACs), and 4) measuring the likelihood distances and finding the final solution. Based on hardware considerations for high-speed processing, no multipliers or dividers are used in the four corresponding hardware modules. Finally, computer simulations and hardware implementation are conducted for a configuration with four transmit antennas, two active transmit antennas, and four receive antennas. According to the simulation results, the proposed algorithm performs almost as well as the optimal method but has a lower computational complexity. Furthermore, according to the hardware implementation results, the proposed architecture needs 547k gates (kGEs), has a preprocessing latency of 64 clock cycles, provides a throughput rate of 1 Gbps and has a hardware efficiency of 1.83 (Mbps/kGEs) when operating at a frequency of 500 MHz. The above results also show that even for fast fading channels, the proposed detector is still a promising candidate for providing a high throughput rate and an acceptable bit error rate (BER). |
URI: | http://scholars.ntou.edu.tw/handle/123456789/24606 | ISSN: | 2169-3536 | DOI: | 10.1109/ACCESS.2023.3343838 |
顯示於: | 資訊工程學系 電機工程學系 |
在 IR 系統中的文件,除了特別指名其著作權條款之外,均受到著作權保護,並且保留所有的權利。