A leakage current suppression technique for cascade SRAM array in 55 nm CMOS technology

Please use this identifier to cite or link to this item: http://scholars.ntou.edu.tw/handle/123456789/6974

Title:	A leakage current suppression technique for cascade SRAM array in 55 nm CMOS technology
Authors:	Hong-Ming Chen Cheng, Y. H.
Issue Date:	Aug-2014
Journal Volume:	57
Journal Issue:	8
Source:	Science China-Information Sciences
URI:	http://scholars.ntou.edu.tw/handle/123456789/6974
ISSN:	1674-733X
DOI:	10.1007/s11432-014-5060-5 ://WOS:000339365500019
Appears in Collections:	水產養殖學系

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