Chip-First Fan-Out Panel-Level Packaging for Heterogeneous Integration

請用此 Handle URI 來引用此文件： http://scholars.ntou.edu.tw/handle/123456789/4485

標題:	Chip-First Fan-Out Panel-Level Packaging for Heterogeneous Integration
作者:	Ko, C. T. Yang, H. Lau, J. H. Li, M. Lin, C. Lin, J. W. Chen, T. Xu, I. Chang, C. L. Pan, J. Y. Wu, H. H. Yong, Q. X. Fan, N. Kuah, E. Li, Z. Tan, K. H. Cheung, Y. M. Ng, E. Wu Kai Hao, J. Beica, R. Lin, M. Chen, Y. H. Cheng, Z. Wee, K. S. Ran, J. Xi, C. Lim, S. P. Lee, N. C. Tao, M. Lo, J. Lee, R. S. W.
公開日期:	九月-2018
卷:	8
期:	9
來源出版物:	Ieee Transactions on Components Packaging and Manufacturing Technology
URI:	http://scholars.ntou.edu.tw/handle/123456789/4485
ISSN:	2156-3950
DOI:	10.1109/tcpmt.2018.2848665 ://WOS:000443977900005
顯示於：	光電與材料科技學系

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