第 1 到 91 筆結果，共 91 筆。
| 公開日期 | 標題 | 作者 | 來源出版物 | WOS | 全文 | |
|---|---|---|---|---|---|---|
| 1 | 2024/6/18 | VLSI-Implementation-Based Fast Symbol Detector for PQSM MIMO Systems | Lu, Hoang-Yang ; Yen, Mao-Hsu ; Li, Yi-Jang; Li, Guang-Yan | JOURNAL OF SIGNAL PROCESSING SYSTEMS FOR SIGNAL IMAGE AND VIDEO TECHNOLOGY | ||
| 2 | 2024/2/1 | Psoas muscle area is an independent survival prognosticator in patients undergoing surgery for long-bone metastases | Lee, Chia-Che; Tseng, Ting-En; Chang, Ruey-Feng; Yen, Hung-Kuan; Chen, Yu-An; Chen, Yu-Yung; Wu, Chih-Horng; Hu, Ming-Hsiao; Yen, Mao-Hsu ; Bongers, Michiel; Groot, Olivier Q.; Lai, Cheng-Yo; Lin, Wei-Hsin | CANCER MEDICINE | ||
| 3 | 2024/1/1 | Does the Presence of Missing Data Affect the Performance of the SORG Machine-learning Algorithm for Patients With Spinal Metastasis? Development of an Internet Application Algorithm | Huang, Chi-Ching; Peng, Kuang-Ping; Hsieh, Hsiang-Chieh; Groot, Olivier Q.; Yen, Hung-Kuan; Tsai, Cheng-Chen; Karhade, Aditya V.; Lin, Yen-Po; Kao, Yin-Tien; Yang, Jiun-Jen; Dai, Shih-Hsiang; Huang, Chuan-Ching; Chen, Chih-Wei; Yen, Mao-Hsu ; Xiao, Fu-Ren; Lin, Wei-Hsin; Verlaan, Jorrit-Jan; Schwab, Joseph H.; Hsu, Feng-Ming; Wong, Tzehong; Yang, Rong-Sen; Yang, Shu-Hua; Hu, Ming-Hsiao | CLINICAL ORTHOPAEDICS AND RELATED RESEARCH | ||
| 4 | 2023/1/1 | Algorithm and VLSI Architecture of a Near-Optimum Symbol Detector for QSM MIMO Systems | Yen, Mao-Hsu ; Lu, Hoang-Yang ; Lu, Ken-Hua; Lin, Shao-Yueh; Chan, Chia-Chen | IEEE ACCESS | ||
| 5 | 2022 | A machine learning algorithm for predicting prolonged postoperative opioid prescription after lumbar disc herniation surgery. An external validation study using 1,316 patients from a Taiwanese cohort | Yen, Hung-Kuan; Ogink, Paul T.; Huang, Chuan-Ching; Groot, Olivier Q.; Su, Chih-Chi; Chen, Shin-Fu; Chen, Chih-Wei; V. Karhade, Aditya; Peng, Kuang-Ping; Lin, Wei-Hsin; Chiang, HongSen; Yang, Jiun-Jen; Dai, Shih-Hsiang; Yen, Mao-Hsu ; Verlaan, Jorrit-Jan; Schwab, Joseph H.; Wong, Tze-Hong; Yang, Shu-Hua; Hu, Ming-Hsiao | SPINE JOURNAL | 4 | |
| 6 | 2022 | Decreased psoas muscle area is a prognosticator for 90-day and 1-year survival in patients undergoing surgical treatment for spinal metastasis | Hu, Ming-Hsiao; Yen, Hung-Kuan; Chen, I-Hsin; Wu, Chih-Horng; Chen, Chih-Wei; Yang, Jiun-Jen; Wang, Zhong-Yu; Yen, Mao-Hsu ; Yang, Shu-Hua; Lin, Wei-Hsin | CLIN NUTR | 4 | |
| 7 | 2022 | Efficient Hardware Implementation of CORDIC-Based Symbol Detector for GSM MIMO Systems: Algorithm and Hardware Architecture | Lu, Hoang-Yang ; Yen, Mao-Hsu ; Chang, Che-Wei; Cheng, Chung-Wei; Hsu, Tzu-Ching; Lin, Yu-Chi | IEEE ACCESS | 2 | |
| 8 | 2022 | Design of a Multi-Sensor System for Exploring the Relation between Finger Spasticity and Voluntary Movement in Patients with Stroke | Bor-Shing Lin; I-Jung Lee; Pei-Chi Hsiao; Shu-Yu Yang; Chen-Yu Chen; Si-Huei Lee; Yu-Fang Huang; Mao-Hsu Yen ; Yu Hen Hu | Sensors | ||
| 9 | 2019 | The Implementation of Time Delay Integrator on Image Sensor | Po-Yen Huang; Ling Jer; Mao-Hsu Yen ; Yuan-Xin Xiao | |||
| 10 | 2019 | Discrete 1_ Probe by Using Flip-Chip IPD Resistor and Amplifier for Inspecting EMI of a Packaged IC | Yin-Cheng Chang; Ta-Yeh Lin; Chaoping Hsieh; Shawn S. H. Hsu; Mao-Hsu Yen ; Jian-Li Dong; Da-Chiang Chang | |||
| 11 | 2018 | Fast group detection for massive MIMOs | Mao-Hsu Yen ; Chen, B. S.; Hoang-Yang Lu | Iet Communications | ||
| 12 | 2018 | EMS Characterization of LDO with On-chip Decaps by Using Direct RF Power Injection Method | Yin-Cheng Chang; Ping-Yi Wang; Hsu-Feng Hsiao; Ta-Yeh Lin; Shuohung Hsu; Mao-Hsu Yen ; MingShan Lin; Da-Chiang Chang | |||
| 13 | 2018 | Fast Symbol Detection for Massive G-STBC MIMO Systems | Mao-Hsu Yen ; Chen, B. S.; Huang, R. Y.; Chang, S. H.; Parinov, I. A.; Hoang-Yang Lu | Wireless Personal Communications | ||
| 14 | 2018 | Implementation of Certified 150-O Voltage Probe for IEC 61967-4 Conducted Electromagnetic Emission Measurement | CHANG YIN-CHENG; LIN TA-YEH; WANG PING-YI; HSU Shawn S. H.; Mao-Hsu Yen ; CHANG DA-CHIANG | |||
| 15 | 2018 | FPGA Implementation of PIC16LF1826 MCU | Mao-Hsu Yen ; Bo-Hao Peng; Wei-Chung Chen; Liang-Yang Lin; Chia-Hung Su; Yih-Hsia Lin; Yin-Cheng Chang; Da-Chiang Chang | |||
| 16 | 2017 | VLSI Implementation of PIC16f84 MCU with In-system Programming | Mao-Hsu Yen ; Wei-Jui Cheng; Chiu-Kuo Chen; Chia-Hung Su; Shih-Bin Lu; Yin-Cheng Chang; Da-Chiang Chang | |||
| 17 | 2017 | Novel Switch Block for Three-Dimensional FPGA Design | Mao-Hsu Yen ; Ming-Yang Shyu; Arthur Tsai; Yeong-Chang Maa ; Yih-Hsia Lin | |||
| 18 | 2017 | Implementation of Chip-Level EMC Strategies in 0.18 µm CMOS Technology | Yin-Cheng Chang; Ping-Yi Wang; Shawn S. H. Hsu; Mao-Hsu Yen ; Yen-Tang Chang; Chiu-Kuo Chen; Ta-Yeh Lin; Da-Chiang Chang | |||
| 19 | 2016 | The Public Transit Navigation System Combined with Real-Time Road Conditions and Carpooling Platform | Yeong-Chang Maa ; Mao-Hsu Yen ; Ying-Shin Lai | |||
| 20 | 2016 | IC-EMC測試平台之PIC MCU設計 | 嚴茂旭 ; 鄭暐叡; 林憶霞; 馬永昌 ; 彭博豪; 陳秋國 | |||
| 21 | 2016 | The Design of Current Probe in the IEC Conducted Emission Measurement above 1 GHz | Yin-Cheng Chang; Ta-Yeh Lin; Ping-Yi Wang; Shawn S. H. Hsu; Mao-Hsu Yen ; Yen-Tang Chang; Ming-Shan Lin; Da-Chiang Chang | |||
| 22 | 2016 | VLSI Implementation of 8051 MCU with Decoupling Capacitor for IC-EMC | Mao-Hsu Yen ; Pei-Jung Tsai; Yeong-Chang Maa ; Chiu-Kuo Chen; Yen-Tang Chang | |||
| 23 | 2016 | Fast group detection schemes for massive MIMOs | Bo-Sing Chen; R.-Y. Huang; Hoang-Yang Lu ; Mao-Hsu Yen | |||
| 24 | 2016 | 結合即時路況與共乘模式的大眾交通工具導引系統 | 馬永昌 ; 嚴茂旭 ; 賴瀅心 | |||
| 25 | 2016 | Semantic-Based Graph Data Anonymization for Big Data Analysis. | Shu-Ming Hsieh; Mao-Hsu Yen ; Li-Jen Kao | |||
| 26 | 2015 | The Implementation of 8051 MCU for IC-EMC Testing | Mao-Hsu Yen ; Yih-Hsia Lin; Yin-Cheng Chang; Pei-Jung Tsai | |||
| 27 | 2015 | Area-Efficient 128-to 2048/1536-Point Pipeline FFT Processor for LTE and Mobile WiMAX Systems | Yu, C.; Mao-Hsu Yen | Ieee Transactions on Very Large Scale Integration (Vlsi) Systems | ||
| 28 | 2015 | VLSI Implementation of FPGA Design using Water-Molecule-Shaped Switch Block | Mao-Hsu Yen ; Chih-Wei Lin ; Yeong-Chang Maa ; Hung-Kuan Yen; Pei-Jung Tsai | |||
| 29 | 2015 | Comparison between Routabilities of State-of-the-art Designs of Switch Blocks in FPGA | Mao-Hsu Yen ; Huang-Kuang Yen; Yih-Hsia Lin; Pei-Ting Huang; Pei-Jung Tsai | |||
| 30 | 2015 | VLSI Implementation of 8051 MCU for IC-EMC Testing Platform | Mao-Hsu Yen ; Chang-Hsien Chung; Wei-Chung Chen; Chiu-Kuo Chen; Yen-Tang Chang | |||
| 31 | 2015 | Comment on "On Optimal Hyperuniversal and Rearrangeable Switch Box Designs" | Mao-Hsu Yen ; Yen, H. K.; Yu, C. | Ieee Transactions on Computer-Aided Design of Integrated Circuits and Systems | ||
| 32 | 2015 | VLSI Implementation of 8051 MCU with In-System Programming | Mao-Hsu Yen ; Yeong-Chang Maa ; Yih-Hsia Lin; Chih-Chen Lai; Shu-Ping Zheng | Intelligent Systems and Applications | ||
| 33 | 2015 | Design of the Multifunction IC-EMC Test Board with Off-Board Probes for Evaluating a Microcontroller | Yin-Cheng Chang; Ping-Yi Wang; Shuohung Hsu; Mao-Hsu Yen ; Yen-Tang Chang; Chiu-kuo Chen; Da-Chiang Chang | |||
| 34 | 2014 | VLSI Implementation of 8051 MCU with In-System Programming | Mao-Hsu Yen ; Yeong-Chang Maa ; Y-S Lin; George Lai; Shu-Ping Zheng | |||
| 35 | 2014 | Using Wi-Fi Direct to Assist Real-Time Traffic Conditions Delivery | Yeong-Chang Maa ; Mao-Hsu Yen ; Yi-Chin Li; Ying-Shin La | |||
| 36 | 2014 | Design of a New Hyperuniversal Switch Block for FPGA Chip | Mao-Hsu Yen ; Hung-Kuan Yen; Yeong-Chang Maa ; Ming-Yang Xu; Shu-Ping Zheng | |||
| 37 | 2014 | 利用Wi-Fi Direct輔助的即時交通路況系統 | 馬永昌 ; 嚴茂旭 ; 李奕親 | |||
| 38 | 2013 | A Generic Three-Sided Rearrangeable Switching Network for Polygonal FPGA Design | Mao-Hsu Yen ; Horng-Ru Liao; Chin-Fa Hsieh; Chu Yu | |||
| 39 | 2013 | Spring gauge system by using R-radius corner detection | 嚴茂旭 ; 辛華昀 ; Chih-Cheng Lai | 0 | ||
| 40 | 2013 | Hyper-Universal Switch Network for FPIC Design | Mao-Hsu Yen ; Chu Yu; Yih-Hsia Lin; Chang-Hsien Chung | |||
| 41 | 2012 | On the Variants of Tagged Geometric History Length Branch Predictors | Yeong-Chang Maa ; Mao-Hsu Yen | |||
| 42 | 2012 | Fast data access and energy-efficient protocol for wireless data broadcast | Haw-Yun Shin ; Tseng, C. C.; Liu, H. H.; Mao-Hsu Yen | Wireless Communications & Mobile Computing | ||
| 43 | 2012 | Hyper-Universal Ring Switch Box for FPGA Design | Mao-Hsu Yen ; Yeong-Chang Maa ; Yu Chu; Wen-Shine Liu; Lee-An Chu | |||
| 44 | 2012 | Design and Implementation of a Low-Power OFDM Receiver for Wireless Communications | Yu, C.; Sung, C. H.; Kuo, C. H.; Mao-Hsu Yen ; Chen, S. J. | Ieee Transactions on Consumer Electronics | ||
| 45 | 2011 | Design and Analysis of Multipath Oriented Branch Predictors | Yeong-Chang Maa ; Mao-Hsu Yen | |||
| 46 | 2011 | R-radius Corner Detection by Using Circular Mask | 嚴茂旭 ; 馬永昌 ; 詹炳坤; 黃政諺; 林晏鈴 | |||
| 47 | 2011 | Low-Power Variable-length Pipeline FFT/IFFT Processor for OFDM-based Communication Systems | Chu Yu; Yi-Ting Liao; Chien-Hung Kuo; Mao-Hsu Yen ; Sao-Jie Chen | |||
| 48 | 2011 | A Generic Three-Sided Rearrangeable Switching Network for FPGA Routing | Mao-Hsu Yen ; Hoang-Yang Lu ; Wen-Shine Liu; Chang-Tu Wu | |||
| 49 | 2011 | A novel low-power 64-point pipelined FFT/IFFT processor for OFDM applications | Chu Yu; Yi-Ting Liao; Mao-Hsu Yen ; Pao-Ann Hsiung; Sao-Jie Chen | |||
| 50 | 2011 | A Low-Power 64-point Pipeline FFT/IFFT Processor for OFDM Applications | Yu, C.; Mao-Hsu Yen ; Hsiung, P. A.; Chen, S. J. | Ieee Transactions on Consumer Electronics | ||
| 51 | 2011 | Design of a Low-Power OFDM Baseband Receiver for Wireless Communications | Chu Yu; Chien-Hung Kuo; Cheng-Hang Sung; Mao-Hsu Yen ; Sao-Jie Chen | |||
| 52 | 2011 | A three-sided rearrangeable switching network for a binary fat tree | Yu, C.; Haw-Yun Shin ; Chen, S. J.; Mao-Hsu Yen | International Journal of Electronics | ||
| 53 | 2010 | Cost-Effective Branch Prediction by Combining Hedging and Filtering | Yeong-Chang Maa ; Mao-Hsu Yen ; Shu-Ming Kuo; Guan-Luen Lee | |||
| 54 | 2010 | Evaluating and Improving Variable Length History Branch Predictors | Yeong-Chang Maa ; Mao-Hsu Yen ; Yu-Tang Wang | |||
| 55 | 2010 | Wavefront Architecture for Computing the Dynamic Space Warping Algorithm | Mao-Hsu Yen ; Yeong-Chang Maa ; Bing-Kun Chan; Wei-Heng Chen; Chih-Hao Ting | |||
| 56 | 2010 | Hedging Filter for Power Aware Branch Prediction | Yeong-Chang Maa ; Mao-Hsu Yen ; Shu-Ming Kuo; Guan-Luen Lee | |||
| 57 | 2010 | A Rearrangeable Hierarchical Interconnection Structure for FPGA Routing Resource | Mao-Hsu Yen ; Bing-Kun Chan; Chun-Ran Huang; Chih-Hao Ting; Zheng-Yan Huang | |||
| 58 | 2010 | Implement an SDR Platform by Using GNU Radio and USRP | Mao-Hsu Yen ; Chu Yu; Kuang-Yu Shie; Yu-Hsiang Huang; Jiun-Liang Lin | |||
| 59 | 2010 | Hierarchical Decoder for Filter-Based Low-Power BTB | Yeong-Chang Maa ; Mao-Hsu Yen ; Chun-Hung Wang; Guan-Luen Lee; Xumin Guo | |||
| 60 | 2010 | A Memoryless Viterbi Decoder for OFDM Systems | Chu Yu; Chih-Jhen Chen; Mao-Hsu Yen ; Pao-Ann Hsiung; Sao-Jie Chen | |||
| 61 | 2010 | An Adaptive PID Controller | Jen-Yang Chen; Chuan-Hsi Liu; Haw-Yun Shin ; Mao-Hsu Yen | |||
| 62 | 2010 | Improving Power Saving for Filter-Based Branch Target Buffer | Yeong-Chang Maa ; Mao-Hsu Yen ; Chun-Hung Wang; Guan-Luen Lee; Xumin Guo | |||
| 63 | 2010 | ARAL-CR: An Adaptive Reasoning And Learning Cognitive Radio Platform | Sao-Jie Chen; Pao-Ann Hsiung; Chu Yu; Mao-Hsu Yen ; Sakir Sezer; Michael J. Schulte; Yu Hen Hu | |||
| 64 | 2010 | Design of a Low Power Viterbi Decoder for Wireless Communication Applications | Chih-Jhen Chen; Chu Yu; Mao-Hsu Yen ; Pao-Ann Hsiung; Sao-Jie Chen | |||
| 65 | 2010 | An adaptive reasoning and learning framework for cognitive radios | Pao-Ann Hsiung; Sao-Jie Chen; Mao-Hsu Yen ; Yu Chu; Chih-Hseng Lin; Ken-Shin Huang; William C. Chu | |||
| 66 | 2009 | An Improved Dynamic Space Warping Algorithm for 2D Image Recognition | Mao-Hsu Yen ; C. Y. Hsu; W. H. Chen; Z. C. Wu | |||
| 67 | 2009 | A Rearrangeable Binary Tree Switching Network for FPGA Routing Architecture | Mao-Hsu Yen ; B. K. Zhan; Y. S. Chen; J. L. Hou | |||
| 68 | 2009 | A Novel Broadcast Paradigm in Supporting Power-Saving Mobile Stations | Haw-Yun Shin ; Mao-Hsu Yen | |||
| 69 | 2009 | Low-Error Fixed-Width Modified Booth Multipliers | Chu Yu; Cheng-Hang Sung; Meng-Hsueh Chiang; Mao-Hsu Yen ; Hwai-Tsu Hu | |||
| 70 | 2009 | Parallel Implementation of Convolution Encoder for Software Defined Radio on DSP Architecture | J. C. Lin; C. Yu; Mao-Hsu Yen ; P. A. Hsiung; S. J. Chen; Y. H. Hu | |||
| 71 | 2009 | A 900 MHz to 5.2 GHz Dual-Loop Feedback Multi-band LNA | J. W. Lin; D. T. Yen; W. Y. Hu; C. Yu; Mao-Hsu Yen ; P. A. Hsiung; S. J. Chen | |||
| 72 | 2009 | Design of a High-Speed Block Interleaving/Deinterleaving Architecture for Wireless Communication Applications | Chu Yu; Mao-Hsu Yen ; Pao-Ann Hsiung; Sao-Jie Chen | |||
| 73 | 2008 | SIMD-Wavefront Architecture for Computing the Dynamic Time Warping Algorithm | Mao-Hsu Yen ; Yeong-Chang Maa ; Chu Yu; Yi-Shan Chen; Yu-Hsiang Huang | |||
| 74 | 2008 | A VLSI Architecture for Computing the Dynamic Space Warping Algorithm | 吳俊龍; 徐嘉延; 黃宇祥; 嚴茂旭 ; 馬永昌 | |||
| 75 | 2008 | A Unified Block Interleaving/Deinterleaving Architecture for Wireless Communication Applications | Chu Yu; Mao-Hsu Yen ; Pao-Ann Hsiung; Sao-Jie Chen | |||
| 76 | 2007 | A DTW VLSI Chip for Computing the DSW Algorithm | Mao-Hsu Yen ; Yeong-Chang Maa ; Yih-Hsia Lin; Shin-Yi Cheng; Chun-Lung Wu | |||
| 77 | 2006 | A Three-Stage Three-Sided Rearrangeable Switching Network for Interconnection Chip | Mao-Hsu Yen ; Yeong-Chang Maa ; Chin-Fa Hsieh; Shiuh-Chung Yi | |||
| 78 | 2006 | Research on Tunable Hardware-Software Development Platform for SOC | S. J. Chen; P. A. Hsiung; T. Y. Lee; J. S. Cherng; C. Yu; Mao-Hsu Yen | |||
| 79 | 2006 | FPGA with Rapid RTR for Embedded Systems | Mao-Hsu Yen ; S. Y. Cheng; Y. H. Lin; H. Y. Shin | |||
| 80 | 2004 | A Rearrangeable and Nonblocking Switching Network for FPIC | Mao-Hsu Yen | |||
| 81 | 2004 | Polygonal FPGA Design | Mao-Hsu Yen ; H. R. Liao; S. C. Yi; S. H. Huang | |||
| 82 | 2003 | Transmission Gates design for Low Power adders | S.C. Yi; C. F. Hsieh; Mao-Hsu Yen | |||
| 83 | 2003 | VLSI Implementation of Polygonal FPGA design | Mao-Hsu Yen | |||
| 84 | 2002 | A Three-Sided Rearrangeable Switching Network for FPGA | Mao-Hsu Yen | |||
| 85 | 2001 | Symmetric and Programmable Multi-Chip Module for Low-Power Prototyping System | Mao-Hsu Yen | |||
| 86 | 2001 | A three-stage one-sided rearrangeable polygonal switching network | Mao-Hsu Yen | |||
| 87 | 2000 | A Study on Improved Search Method in CELP Stochastic Codebook of Speech Coding | H. R. Liao; Mao-Hsu Yen | |||
| 88 | 1999 | Polygonal Routing Network for FPGA/FPIC | Mao-Hsu Yen | |||
| 89 | 1999 | Symmetric and Programmable Multi-Chip Module for Rapid Prototyping System | Mao-Hsu Yen | |||
| 90 | 1996 | Three-dimensional Corner Detection Based on Two-dimensional DCT Descriptor | Mao-Hsu Yen | |||
| 91 | 1993 | SIMD-Systolic Architecture and VLSI Chip for Computing the Dynamic Time-Warping Algorithm | C. M. Wu; Mao-Hsu Yen |
